The present invention is related to over-voltage comparators and more particularly to an over-voltage comparator circuit that includes a particular power-savings feature during normal voltage operating conditions.
The following symbol conventions are used to describe the prior art as well as the present invention, and are listed below in Table 1.
TABLE 1Symbols ConventionsVSpower supply voltage to be detected.5 Von-chip internal 5 V supply.Vdropvoltage drop of a series of zener diodes and bipolar transistors.It has low temperature coefficient.VBGvoltage of on-chip bandgap reference, around 1.24 V.VSthresholdthreshold voltage of over-voltage comparator. It is muchhigher than normal operation voltage.Ibbias current.Ippull current.
In general, there are two traditional circuit structures that are used for over-voltage comparators. The first traditional comparator structure 100 is shown in FIG. 1. Comparator 100 includes Vdrop circuit 102 coupled to the VS power supply voltage source, a resistor divider 106 including resistors R1 and R2 coupled between Vdrop circuit 102 and ground. An NMOS transistor M1 has a gate coupled to resistor divider 106, a drain for receiving the bias current Ib, and a source coupled to ground. The bias current Ib is coupled between the internal five volt power supply voltage source and the drain of transistor M1. A Schmitt trigger circuit 104 has an input coupled to the drain of transistor M1 and an output for providing the OUT over-voltage output signal.
The comparator circuit 100 takes the threshold voltage of NMOS transistor M1 as a reference voltage. The threshold voltage is given by the following equation:
                              VS          threshold                =                                            V                              GS                ⁡                                  (                                      M                    ⁢                                                                                  ⁢                    1                                    )                                                      *                                                            R                  2                                +                                  R                  1                                                            R                2                                              +                      V            drop                                              [        1        ]            The bias current is given by the following equation:
                              I          b                =                              1            2                    ⁢                      μ            n                    ⁢                                                    C                ox                            ⁡                              (                                                      V                                          GS                      ⁡                                              (                                                  M                          ⁢                                                                                                          ⁢                          1                                                )                                                                              -                                      V                                          th                      ⁡                                              (                                                  M                          ⁢                                                                                                          ⁢                          1                                                )                                                                                            )                                      2                                              [        2        ]            The transition threshold of circuit 100 can be derived from equations [1] and [2] as follows:
                              VS          threshold                =                                            [                                                                                          2                                                                        μ                          n                                                ⁢                                                  C                          ox                                                                                      *                                          I                      b                                                                      +                                  V                                      th                    ⁡                                          (                                              M                        ⁢                                                                                                  ⁢                        1                                            )                                                                                  ]                        *                                                            R                  1                                +                                  R                  2                                                            R                2                                              +                      V            drop                                              [        3        ]            
It can be seen that the threshold of comparator circuit 100 varies with the threshold voltage Vth of NMOS transistor M1, which changes with semiconductor process and temperature. It can also be that the threshold of comparator circuit 100 varies with the accuracy of bias current Ib.
The second traditional over-voltage comparator circuit 200 is shown in FIG. 2. Comparator circuit 200 similarly includes Vdrop circuit 202 and resistor divider 206 as previously described. Additionally, comparator circuit 200 includes a current mirror circuit 208 having a power terminal coupled to the internal five volt power supply voltage, an input for receiving the Ib bias current, and an output for supplying the Iin current to comparator 210. Comparator 210 includes a first input coupled to the output of resistor divider 206, a second input for receiving an on-chip bandgap reference voltage VBG. The output of comparator 210 is coupled to the input of Schmitt trigger circuit 204. The output of Schmitt trigger circuit 204 provides the output OUT signal indication of an over-voltage condition.
The threshold voltage of circuit 200 is given by the following equation:
                              VS          threshold                =                                            V              BG                        *                                                            R                  1                                +                                  R                  2                                                            R                2                                              +                      V            drop                                              [        4        ]            The threshold of comparator circuit 200 has better precision than the first solution because it only concerns with VBG, the matching of R1 and R2, and Vdrop. The drawback is that its quiescent current is not zero even if VS is in normal working, as demonstrated in the equation below:Iquiescent=Iin+Ib  [5]In low quiescent current chip designs, this non-zero current has to be taken into consideration.
What is desired, therefore, is an over-voltage comparator circuit that has a precision threshold, yet does not draw any appreciable quiescent current during normal operation conditions.